Power state coordination between devices sharing power-managed resources

ABSTRACT

Methods and apparatuses for coordination of power state management in and electronic system.

RELATED APPLICATIONS

The present application is a continuation-in-part of U.S. applicationSer. No. 10/______ entitled “Hardware Coordination Of Power ManagementActivities” by Jeffrey R. Wilcox, et al., filed on Jun. 2, 2004.

TECHNICAL FIELD

Embodiments of the invention relate generally to computing systems. Moreparticularly, embodiments of the invention relate to message exchangesfor controlling computing system operational (e.g., power) modes.

BACKGROUND

Power management in modem computer systems plays an important role inconserving energy, managing heat dissipation, and improving systemperformance. For example, modem computer systems are often designed foruse in settings where a reliable external power supply is not available,making power management important for energy conservation. Even whenreliable external power supplies are available, power management withinthe computing system can reduce heat produced by the system enablingimproved performance of the system. Computing systems generally havebetter performance at lower ambient temperatures because key componentscan run at higher speeds without damaging their circuitry.

One approach to power management involves the implementation of variouspower states in system devices, where placing a device into a relativelylow power state reduces energy consumption. The tradeoff to operating adevice in a low power state is typically a reduction in the level ofperformance of the device. It should be noted, however, that theoperation of some devices might in fact be dependent upon on theoperation of other devices. For example, a processor might have a cachethat is snooped by other processors, where placing the processor in alower power state could negatively affect snoop latencies experienced bythe other processors. Simply put, a power state transition in one devicemay prevent other devices from functioning at a desired level ofperformance.

BRIEF DESCRIPTION OF THE DRAWINGS

Embodiments of the invention are illustrated by way of example, and notby way of limitation, in the figures of the accompanying drawings inwhich like reference numerals refer to similar elements.

FIG. 1 is a block diagram of an example of a system having coordinationagent;

FIG. 2A is a diagram of an example of a computer system;

FIG. 2B is a diagram of a second example of a computer system;

FIG. 3 is a flowchart of an example of a method of managing power statetransitions;

FIG. 4 is a flowchart of an example of a process of using coordinationagent to determine whether a power state transition in a primary deviceis permitted by a set of secondary devices;

FIG. 5 is a flowchart of an example of a process of managing power basedon secondary device permissions; and

FIG. 6 is a flowchart of an example of a retry protocol.

FIG. 7 is a diagram of an example of a power state change request andresponse exchange.

DETAILED DESCRIPTION

In the following description, numerous specific details are set forth.However, embodiments of the invention may be practiced without thesespecific details. In other instances, well-known circuits, structuresand techniques have not been shown in detail in order not to obscure theunderstanding of this description.

Hardware System Overview

FIG. 1 shows a system 10 in which a primary device 12 shares a resource14 with a set of secondary devices 16 (16 a-16 n). The resource 14 canbe a memory structure, controller, interface, etc., and the term“device” is used to refer to any physical agent or node of a system.Examples of devices include, but are not limited to, processors,graphics controllers and cache controllers. It should also be noted thatthe primary device 12 could have multiple shared resources. Furthermore,the terms “primary” and “secondary” are only used for ease of discussionand can apply to any of the devices shown depending on the perspectivefrom which the discussion is made.

Because the primary device 12 and the secondary devices 16 share theresource 14, power state changes within the primary device 12 have thepotential to negatively (or positively) affect the performance of thesecondary devices 16. Accordingly, in one embodiment, the primary device12 uses coordination agent 18 to determine whether pending power thesecondary devices 16 permit state transitions in the primary device 12.In an alternate embodiment, coordination agent 18 can be implemented insoftware, or a combination of hardware and software.

In one embodiment, the coordination agent can include, for example, anembedded logic circuit of an application specific integrated circuit(ASIC) or any other commercially available hardware component. By usingcoordination agent 18 to resolve the dependency issues associated withpower state transitions, or other operating state transitions, thesystem 10 is able to achieve greater efficiency and enhancedperformance. For example, the coordination agent 18 functions based onthe dependencies associated with power state transitions in the primarydevice 12, and does not require knowledge of other system dependencies.As a result, systems having a relatively large number of interdependentdevices and/or components can benefit from reduced complexity.

Although the coordination agent 18 is shown as being incorporated intothe primary device 12, the coordination agent 18 could also beimplemented in a separate device and/or package. Furthermore, the numberof devices can vary depending upon the circumstances. As already noted,the terms “primary” and “secondary” are only used to facilitate thediscussion. For example, the device 16 a could also be viewed as aprimary device with respect to coordination agent within the device 16a. Likewise, the device 12 could be viewed as a secondary device fromthe perspective of the device 16 a (provided the device 12 depends uponpower state transitions within the device 16 a).

Turning now to FIG. 2A, a computer system 20 is shown to illustratecertain advantages associated with the principles described herein. Inparticular, a first processor node 22 has a first processor 24, a firstcache 26 and first coordination agent 28. Similarly, a second processornode 30 includes a second processor 32, a second cache 34 and secondcoordination agent 36, and a third processor node 38 includes a thirdprocessor 40, a third cache 42 and third coordination agent 44.

Assume, for example, that the first cache 26 is coherent with the secondcache 34 and the third cache 42, and therefore must be “snooped” by thesecond and third processors 32, 40 in order to ensure coherency. Assumefurther that the first processor node 22 receives a notification of aplanned power state transition in the first processor 24. The powerstate transition might be from state “P2” to “P4”, where state P4provides lower power consumption and lower performance for the firstprocessor 24 than state P2. Lower performance could be characterized bythe suspension of certain features, where different power states suspenddifferent features. Therefore, the above example of a transition fromstate P2 to P4 might result in a higher latency and/or decrease inbandwidth. It should be noted that alternatively, the transition couldbe to a state that provides higher power consumption and performance.

The coordination agent 28 identifies the second and third processornodes 30, 38 as being dependent upon the power state transition. Theidentification can be made by consulting either an explicit or animplicit dependencies list that is dedicated to the first processor node22. The dependencies list may be generated by a number of differentmechanisms. For example, the list could be stored in a register by basisinput/output system (BIOS) software or a system management controller atthe time of startup. The dependencies list can also take on a number ofdifferent formats. For example, a single list could be used for everystate type and level being coordinated. Alternatively, there could be aunique list for each state type and level. It should be noted that thedependencies list could be implicit in cases where all secondary devicesin the system are deemed to be dependent on state transitions in theprimary device. In such a case, a list would not need to be consulted.One example of this type of scenario could be a system having only twonodes.

Once the appropriate dependencies have been identified, the coordinationagent 28 then queries the second and third processor nodes 30, 38 todetermine whether the power state transition is permitted. Dependingupon the status of each of the processors 32, 40 and their respectivepower management policies, the power state transition may or may not bepermitted. For example, the second processor 32 may not be currentlyrunning a thread and could therefore have a policy that permits thetransition. On the other hand, the third processor 40 could be running ahigh priority thread and anticipating the need to snoop the first cache26. If, for example, the software controlling the third processor 40requires a minimum power state level of P2 under these conditions, thetransition to level P4 would be denied. In such a case, since all of theprocessors dependent upon the transition have not approved the powerstate transition, the first processor 24 would remain in power state P2.

Although the processor nodes 20, 30 and 38 are shown as beinginterconnected by a single interface 21, other approaches to connectingthe devices can be used. For example, multiple buses and intermediatebridges between the buses can be incorporated in to the interface 21.Indeed, the interface 21 can represent a portion of a point-to-pointfabric, which interconnects all of the devices in the computer system20. An example of such a topology is shown in FIG. 2B.

In the illustrated embodiment, a point-to-point network interconnect 23is coupled to processor nodes 20, 30, 38 and 39. In the point-to-pointfabric topology, each node has a direct link to other nodes in thesystem. The network interconnect 23 can also have a layeredcommunication protocol in which power management messages aretransferred between nodes in packets at a protocol layer. Packets aredata structures having a header and payload; where, the header includes“routing information” such as the source address and/or destinationaddress of the packet; and/or, a connection identifier that identifies aconnection that effectively exists in the network interconnect 23 totransport the packet. Other layers such as transport, routing, link andphysical layers can reside beneath the protocol layer in the hierarchy.

Power Management Techniques

In one embodiment, a coordination agent residing in an electronic systemhaving one or more resources shared by multiple devices may includefunctionality to cause a processor or other primary device to transitionto a lower power state. The coordination agent can be implemented ashardware, software or any combination of hardware and software. Thecoordination agent may not have visibility as to the requirements ofsecondary devices that depend on a shared resource when the primarydevice is to be transitioned to the lower power state. For example, aprocessor having a cache that is accessible by other processors may betargeted for transition to a lower power state, but one or more of theother processors may require access to the cache and may not be visibleto the coordination agent.

When a secondary device depends on a resource that may experience apower (or performance) state change, the secondary device may providefeedback to the coordination agent (or primary device) regarding thedependency. This feedback may provide the coordination agent withinformation not available from the primary device, which may allow thecoordination agent to provide better power management. Without thefeedback, an autonomous action by the coordination agent with respect tothe primary device could have a debilitating impact on secondarydevices.

Described in greater detail below is a mechanism whereby the primarydevice and/or coordination agent coupled to a communications fabric canquery secondary devices that depend on a shared resource in order todetermine whether a change in power or operational state may adverselyaffect the secondary devices. This coordination mechanism providesincreased power/performance functionality as compared to a systemwithout the coordination mechanism.

In one embodiment, the power management mechanism may determine twopower state values. The first power state value may be referred to asthe “desired state,” which may correspond to the state in which thecoordination agent would place the primary device if no secondarydevices depend on the shared resource. The second power state value maybe referred to as the “allowed state,” which may correspond to the statethat is allowed by the secondary devices that depend on the sharedresource. Thus, the resulting power state of the primary device may bedifferent than the desired state because the primary device may not beallowed to transition to the desired power state based on responses fromthe secondary devices.

In one embodiment, when the coordination agent receives an indication ofa power state transition, for example, from system software (orinitiates a transition to a different power state) for the primarydevice, the coordination agent (or primary device) may collect feedbackfrom one or more secondary devices that have dependencies upon theshared resource.

As an example, the primary device may be a processor that is to betransitioned to a sleep state where the processor cache may not beavailable to other system processors for snoops for many microseconds.In one embodiment, the coordination agent or the processor obtains“permission” through feedback from secondary devices (e.g., the otherprocessors) to transition to the sleep state. That is, devices that maysnoop the processor cache may provide feedback to the coordination agentor processor regarding the state transition.

In one embodiment, in order to solicit feedback from dependentresources, the coordination agent or primary device may send a messageto each secondary device. Dependencies may be determined, for example,by checking a dependency list that is created by system managementsoftware or system BIOS (basic input/output system).

In one embodiment, the message sent to the secondary devices indicatesthat the target device may make a power state transition and,optionally, the desired state. Secondary devices that receive themessage may respond by indicating a power state that would be allowablewithout detrimentally affecting performance of the secondary device. Insome situations, though not all, the allowable state as indicated by thesecondary devices may correspond to the power state of the secondarydevice.

In one embodiment, when the coordination agent (or primary device)receives responses from one or more secondary devices, a power state canbe determined. The power state to be used for the primary device may be,for example, the highest power/performance level state from the set ofthe desired power sate and the allowable power states as indicated bythe secondary devices. This results in the selection of performance overpower savings. In alternate embodiments, other states may be selected,for example, the lowest power state, which selects power savings overperformance.

In one embodiment, secondary devices may take no power state transitionin response to the request message. In one embodiment, a secondarysystem device may not receive or process response messages from othersecondary devices. Further, the secondary device may not receive anindication of the power state to which the primary device hastransitioned.

In one embodiment, a retry mechanism that supports re-querying can beprovided. The retry mechanism may be invoked, for example, when systemconditions change that may affect the result of a previous power statetransition. In one embodiment, a retry bit may be included in a requestmessage to indicate whether the message is an initial request message ora retry request message. The state of the retry bit may allow a deviceto determine whether a power state or other condition has changed.Multiple retry techniques are described in greater detail below.

FIG. 3 shows a method 46 of managing power. The method 46 can beimplemented as an embedded logic circuit of an ASIC or any othercommercially available hardware technique, as already discussed.Processing block 48 provides for receiving notification of a pendingpower state transition in a primary device. Typically, the notificationwill be received from software, although the notification may also bereceived from a hardware component such as a hardware-based monitorperforming targeted performance feedback. In one embodiment,coordination agent is used at block 50 to determine whether the powerstate transition is permitted by a set of secondary devices and block 52provides for managing power for the primary device according to thepermissions, as described above.

Turning now to FIG. 4, one approach to using a coordination agent todetermine whether a power state transition is permitted is shown ingreater detail at block 54. Accordingly, block 54 can be readilysubstituted for block 50 (FIG. 3) discussed above. Specifically, eachdevice in the set of secondary devices is identified as being dependenton the power state transition at block 56. As already noted, identifyingthe dependent devices can be accomplished by accessing either anexplicit or an implicit dependencies list 57, where the dependencieslist is dedicated to the primary device. Block 58 provides for sending aset of transition requests to the set of secondary devices and block 60provides for receiving a set of transition replies from the set ofsecondary devices, where each transition reply indicates whether thepower state transition is permitted.

FIG. 5 shows one approach to managing power for the primary deviceaccording to secondary device permissions in greater detail at block 62.Accordingly, block 62 can be readily substituted for block 52 (FIG. 3)discussed above. In particular, block 64 provides for determiningwhether all of the transition replies indicate that the proposed powerstate transition is approved. If so, the proposed power state transitionis initiated in the primary device at block 66. Otherwise, it isdetermined at block 68 whether one or more of the transition repliesindicate that an alternative power state transition is permitted. Inparticular, if the proposed power state transition is to a lower state,the alternative power state might be an intermediate state between thecurrent state and the proposed state. For example, the proposed powerstate transition could be from P2 to P4, where one of the secondarydevices will only permit a transition from P2 to P3. The alternativepower state transition can be determined by hardware and/or softwareperformance monitors of a limiting secondary device, where the limitingsecondary device transmits the alternative power state transition to theprimary device in a transition reply. If an alternative power state isidentified, block 70 provides for initiating the alternative power statein the primary device.

FIG. 6 is a flowchart of an example of a retry protocol. If so, each ofthe transition requests is flagged as a retry request at block 74 andthe transition requests are re-sent to the secondary devices at block76. Block 78 provides for receiving a set of transition replies andblock 80 provides for managing the power of the primary device based onthe replies. Alternatively, the primary device could simply poll thesecondary devices periodically (i.e., repeat the re-sending on aperiodic basis) in order to determine whether the initial request ispermitted due to a change in the blocking condition. Such an approachwould provide greater simplicity at the possible expense of lowerperformance and higher energy consumption.

One specific example of a retry protocol can be used after a primarydevice has attempted a transition to a lower power state and the resultwas a transition to a state having a non-optimum power level from theperspective of the primary device (i.e., no change or a change to someintermediate state). Since the primary device is not at the initiallyrequested state, the primary device can make another attempt totransition to the initially requested state once the “blocking”conditions are no longer present. In such a case, if the primary devicereceives an initial transition request from one of the secondarydevices, the request serves as an indication that the blocking conditionmay no longer be present because an initial transition request impliessome sort of change in the power conditions of the transmitting device.The retry bit therefore informs the receiving secondary device as towhether or not a retry is necessary when a new request is detected.

Otherwise, devices could engage in a perpetual exchange of retryrequests (i.e., a “deadlocking” condition) because none of the devicesare able to distinguish between an incoming request representing anactual power condition change and one merely representing a retry. Inorder to determine whether the initially requested state is allowable,the primary device re-sends the transition requests as retry requests.

Another example of a retry protocol can be implemented when a transitionto a higher power state is requested by a secondary device (i.e., an“increasing” secondary device). In such a case, an increase in the powerstate of the primary device may also require an increase in the powerlevels of the remaining secondary devices to meet the performancerequirements of the device initiating the increase. Accordingly, aprimary device may re-send transition requests when a secondary devicerequests an increase in power state. Simply put, when a device detectsan initial request to a power state that is higher than its own powerstate, the device can issue retry requests to determine its newcoordinated power state level.

Yet another example of a retry protocol can be used when a primarydevice has sent a transition request (either an initial or a retryrequest) and it receives an initial request from a secondary devicebefore it has received replies from all of the secondary devices. Such acase would indicate that there is a possibility that some of the repliesare stale and that retry requests should be issued.

FIG. 7 is a diagram of an example of a power state change request andresponse exchange. The example of FIG. 7 includes three devices (700,710 and 720) that pass messages to coordinate power state changes. Theexample of FIG. 7 is limited to three devices for reasons of simplicityof description. Any number of devices can be supported with messagingprotocol described herein. The example of FIG. 7 further includes timeindications (Time 1, Time 2, Time 3, Time 4 and Time 5). These timeindications are illustrated to provide a general concept of the temporalrelationships of various messages and are not intended to representstrict timing requirements.

At Time 1, device 710 receives an indication of change in desired powerstate from P1 (the current power state) to P4 (a lower power state). Theindication may be received from, for example, a power control agent oroperating system software. In response to the indication, a coordinationagent (or device 710) sends messages (labeled “Request[P4]) to nodes 700and 720 indicating the intended power state change. The message mayinclude, for example, a retry bit, an indication of the current powerstate and/or the desired power state.

At Time 2, devices 700 and 720 receive the initial request from device710. In one embodiment, in response to the initial request, thereceiving (secondary) devices generate responses indicating allowablepower states for device 710 from the perspective of the receivingdevices. In the example of FIG. 7, device 700 responds with an allowablepower state of P3 and device 720 responds with an allowable power stateof P2.

At Time 3, device 710 (or coordination agent) receives the responsesfrom devices 700 and 720 and determines a power state for device 710. Inone embodiment, device 710 may transition to a highest allowable powerstate. In such an embodiment, device 710 would transition to a powerstate of P2 as indicated by device 720. In an alternate embodiment,device 710 may transition to a lowest allowable power state. In such anembodiment, device 710 would transition to a power state of P3 asindicated by device 700. In another alternate embodiment, a differentpower state, for example, an intermediate power state can be used bydevice 710.

In one embodiment, at Time 3, devices 700 and 720 can issue retrymessages (Request[P3] from device 700 and Request [P2] from device 720)because devices 700 and 720 were not in the desired states when theinitial request was received from device 710.

At Time 4, devices 700 and 710 receive a retry request message fromdevice 720 requesting a transition to power state P2. Similarly, devices710 and 720 receive a retry request message from device 700 requesting atransition to power state P3. In response to the retry request messages,device 710 issues a response message indicating the power state P4 isallowable because device 710 is in the P4 power state. Similarly, inresponse to the retry request messages, device 700 issues a responsemessage indicating the power state P3 is allowable because device 700 isin the P3 power state and device 720 issues a response messageindicating the power state P2 is allowable because device 720 is in theP2 power state.

At Time 5, device 700 receives the response messages from devices 710and 720 indicating that power states P4 and P2, respectively, areallowable. In one embodiment, in response to receiving the responsemessages, device 700 transitions to a power state of P2. Also, at Time5, device 720 receives the response messages from devices 700 and 700indicating that power states P3 and P4, respectively, are allowable. Inone embodiment, in response to receiving the response messages, device720 transitions to a power state of P3.

The example of FIG. 7 results in each of devices 700, 710 and 720transitioning to a different power state than at Time 1. The coordinatedtransition of power states as described with respect to FIG. 7 canprovide in an increased overall system efficiency by balancing the powerand performance requirements of multiple system devices.

CONCLUSION

Reference in the specification to “one embodiment” or “an embodiment”means that a particular feature, structure, or characteristic describedin connection with the embodiment is included in at least one embodimentof the invention. The appearances of the phrase “in one embodiment” invarious places in the specification are not necessarily all referring tothe same embodiment.

While the invention has been described in terms of several embodiments,those skilled in the art will recognize that the invention is notlimited to the embodiments described, but can be practiced withmodification and alteration within the spirit and scope of the appendedclaims. The description is thus to be regarded as illustrative insteadof limiting.

1. A method comprising: transmitting a message indicating a potentialchange of operational state for a primary device in an electronicsystem; receiving one or more responses to the message from one or morerespective secondary devices coupled with the primary device indicatingallowable operational states of the primary device indicated by the oneor more secondary devices; and transitioning the primary device to anoperational state determined based on the responses received from thesecondary devices.
 2. The method of claim 1 further comprisinginitiating an alternative operational state transition in the primarydevice if one or more of the responses indicate that the alternativepower state transition is permitted, the alternative power statetransition being based on a performance requirement of at least one ofthe secondary devices.
 3. The method of claim 1 wherein transmitting themessage indicating the potential change of operational state for theprimary device comprises: receiving notification of a pending powerstate transition; and using coordination agent to generate a message tobe transmitted to one or more secondary devices to determine whether thepower state transition in a primary device is permitted by the one ormore secondary devices, the primary device sharing a resource with theset of secondary devices.
 4. The method of claim 1 wherein transitioningthe primary device to an operational state determined based on theresponses received from the secondary devices comprises: comparing atarget power state for the primary device to one or more allowable powerstates for the primary device as indicated by the responses receivedfrom the secondary devices; and causing the primary device to transitionto one of the target power state and the one or more allowable powerstates.
 5. The method of claim 4 wherein causing the primary device totransition to one of the target power state and the one or moreallowable power states comprises causing the primary power state totransition to a highest power state from the target power state and theone or more allowable power states.
 6. The method of claim 4 whereincausing the primary device to transition to one of the target powerstate and the one or more allowable power states comprises causing theprimary power state to transition to a lowest power state from thetarget power state and the one or more allowable power states.
 7. Themethod of claim 1 wherein the operational state comprises a power state.8. The method of claim 1 wherein the operational state comprises aperfomance state.
 9. The method of claim 1 further comprising:transmitting a subsequent message indicating a potential change ofoperational state for the primary device; indicating the subsequentmessage as a retry message; receiving one or more subsequent responsesto the subsequent message from one or more respective secondary devicescoupled with the primary device indicating allowable operational statesof the primary device indicated by the one or more secondary devices;and transitioning the primary device to a subsequent operational statedetermined based on the subsequent responses received from the secondarydevices.
 10. The method of claim 1 further comprising: transmitting amessage indicating a potential change of operational state for one ofthe secondary devices; indicating the subsequent message as a retrymessage; and transitioning the primary device to a selected operationalstate determined based on responses received from the secondary devices.11. The method of claim 1 further comprising: transmitting a messageindicating a potential change of operational state for a selected one ofthe secondary devices; indicating the subsequent message as a retrymessage; and transitioning the selected secondary device to anoperational state determined based on responses received from the othersecondary devices.
 12. An apparatus comprising: a primary device havinga resource to be shared with one or more secondary devices coupled withthe primary device; and a coordination agent coupled with the primarydevice and the one or more secondary devices to transmit a messageindicating a potential change of operational state for a primary deviceto the one or more secondary devices and to cause the primary device totransition to an operational state determined based on responsesreceived from the secondary devices.
 13. The apparatus of claim 12,wherein the coordination agent receives notification of a power statetransition, identifies secondary devices as being dependent on a powerstate transition, sends the message to the secondary devices, receivesthe responses from the secondary devices.
 14. The apparatus of claim 12,wherein the primary device comprises a processor, the resource comprisesa cache memory, and at least one of the secondary devices comprises aprocessor.
 15. The apparatus of claim 12, wherein the coordination agentis coupled to access at least one of an explicit and an implicitdependencies list to identify secondary devices as being dependent on apower state transition, the dependencies list to be dedicated to theprimary device.
 16. The apparatus of claim 12 wherein the operationalstate comprises a power state.
 17. The apparatus of claim 12 wherein theoperational state comprises a performance state.
 18. The apparatus ofclaim 11 wherein the coordination agent comprises circuitry in anelectronic system.
 19. The apparatus of claim 11 wherein thecoordination agent comprises circuitry configured to communicate withmultiple devices configured as a network of wireless devices.
 20. Theapparatus of claim 11 wherein the coordination agent causes the primarydevice to transition to a highest power state from a target power stateas indicated by the message and one or more allowable power states asindicated by the responses.
 21. The apparatus of claim 11 wherein thecoordination agent causes the primary device to transition to a lowestpower state from a target power state as indicated by the message andone or more allowable power states as indicated by the responses.
 22. Asystem comprising: a digital signal processor; a primary device coupledwith the digital signal processor having a resource to be shared withone or more secondary devices coupled with the primary device; and acoordination agent coupled with the primary device and the one or moresecondary devices to transmit a message indicating a potential change ofoperational state for a primary device to the one or more secondarydevices and to cause the primary device to transition to an operationalstate determined based on responses received from the secondary devices.23. The system of claim 22, wherein the coordination agent receivesnotification of a power state transition, identifies secondary devicesas being dependent on a power state transition, sends the message to thesecondary devices, receives the responses from the secondary devices.24. The system of claim 22, wherein the primary device comprises aprocessor, the resource comprises a cache memory, and at least one ofthe secondary devices comprises a processor.
 25. The system of claim 22,wherein the coordination agent is coupled to access at least one of anexplicit and an implicit dependencies list to identify secondary devicesas being dependent on a power state transition, the dependencies list tobe dedicated to the primary device.
 26. The system of claim 22 whereinthe operational state comprises a power state.
 27. The system of claim22 wherein the operational state comprises a performance state.
 28. Thesystem of claim 22 wherein the coordination agent comprises circuitry inan electronic system.
 29. The system of claim 22 wherein thecoordination agent causes the primary device to transition to a highestpower state from a target power state as indicated by the message andone or more allowable power states as indicated by the responses. 30.The system of claim 22 wherein the coordination agent causes the primarydevice to transition to a lowest power state from a target power stateas indicated by the message and one or more allowable power states asindicated by the responses.